Today’s SRAM and flash memories, Bluetooth interfaces and sensors consume too much power to serve volume IoT nodes in 2027, panelists said. They sketched out a few possibilities for what may replace them.

Ideally, a 2027 end node SoC will consume just 10 microwatts/MHz and send and transmit data on a radio drawing only 1 or 2 milliwatts, said Jason Hillyard, a director of software in ARM’s wireless group. His “slideware SoC” used a new architecture built of subthreshold circuits suited for its energy harvesting power source

One of the widest chasms in getting to such a devcie is the lack of suitable memories, said Lucian Shifren, a senior principal research engineer at ARM.

“Memory energy is major problem going forward,” Shifren said. “Everyone is betting on ReRAM and STT to replace SRAM and flash, but I don’t think either one will work…and I don’t see any viable replacements out there,” he said, noting STT is expensive and uses too much write energy while ReRAM and phase-change alternatives use relatively high voltages.

ARM has made test chips using new memories based on academic research, said Mike Muller, ARM’s chief technologist in an interview with EE Times. However, he declined to share any milestones from the test chips.

“The ideal is a non-volatile, low-power design that’s good for logic as well as memory…there will be an expanded range of memories but they will not replace flash,” Muller said.

Meanwhile microcontrollers based on subthreshold circuits are already htting a memory wall, said Scott Hanson, CTO of Ambiq Micro. “There are use cases where I’d like to write a lot of data locally, but I can’t do that today,” he said.